As known, phase-change memory (PCM) arrays use a class of materials which have the property of changing between two phases having distinct electrical characteristics. Chalcogenides, for example, may change from a disordered amorphous phase to an ordered crystalline or polycrystalline phase. The two phases are associated to considerably different values of resistivity which may be sensed and associated with different memory states. In particular, a phase-change memory cell may be defined as “set” when, under appropriate biasing, a detectable current is conducted (e.g., a condition typically associated to a logic state “1”), and as “reset” when, under the same biasing, a much lower current is conducted (e.g., logic state “0”).
The phase change may be obtained by increasing the temperature. Nucleation occurs if the phase change material is kept at the crystallization temperature, for example, above about 200° C., for a sufficient length of time. If a system application exposes a PCM array to ambient temperatures approaching the crystallization temperature for a sufficient amount of time, memory retention errors can occur when data corresponding to the amorphous state is lost. Such retention errors may preclude the use of PCM in high temperature applications absent a material improvement or a burdensome level of error correction code (ECC). For example, many automotive applications may specify non-volatility at over 150° C. with data retention targeting 10, or even 20, years in demanding applications.
A PCM memory providing improved data retention at temperature ranges over 100 C is therefore advantageous.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements.